इंटरैक्टिव सिमुलेशन
करंट मिरर सिमुलेशन
एक ट्रांजिस्टर करंट तय करता है, उसका जुड़वाँ उसे कॉपी करता है — जब तक लोड की गुंजाइश ख़त्म न हो।
Q1 is wired as a diode, so whatever current you force through it prints a Vbe on the shared base rail — and Q2, being the same transistor, answers with the same current whatever its collector is doing. Two things spoil the copy. Both bases are fed out of the reference branch, so Iref is short by Ib1 + Ib2 and the output lands at Iref/(1 + 2/β): drop β to 10 and the mirror is 17 % light. And Q2's collector sits at Vout while Q1's sits at Vbe, so the Early effect tilts the plateau up by (1 + Vout/VA) — the slope of that tilt is the mirror's output resistance, r₀ ≈ VA/Iout. Then drag the load voltage down towards zero: below about 0.3 V the collector junction forward-biases, Q2 saturates, the output current collapses and the base current it now demands is stolen from the reference. That floor is the compliance limit, and it is why a mirror needs a few hundred millivolts of headroom to work at all.
