Diagrama de pines
Pines de 24LC256 I2C EEPROM

Pines
- 1: A0 — Address-select input; sets the low bit of the chip's 3-bit I2C address along with A1/A2, and must be tied to VCC or GND (never left floating).
- 2: A1 — Address-select input; middle bit of the address-select trio, letting up to 8 of these EEPROMs share one I2C bus at once.
- 3: A2 — Address-select input; high bit of the address-select trio — with all three grounded the device answers at the default 0x50.
- 4: VSS — Ground reference for the chip.
- 5: SDA — I2C serial data line, open-drain; needs an external pull-up resistor (commonly 2.2–10 kΩ) since the chip has none built in.
- 6: SCL — I2C serial clock line, open-drain like SDA and needing its own external pull-up.
- 7: WP — Write-protect input; tie to VCC to make the whole 32 KB array read-only, tie to GND for normal read/write — don't leave it floating.
- 8: VCC — Supply voltage, 2.5–5.5 V on the 24LC256 (the 24AA256/24FC256 variants extend down to about 1.7 V); draws a few mA when active and next to nothing in standby.
Especificaciones
| Capacidad | 256 Kbit (32 KB) |
|---|---|
| Tensión de alimentación | 24LC256: 2.5–5.5 V; 24AA256: 1.7–5.5 V |
| Interfaz | I2C, 400 kHz (24FC256: 1 MHz) |
| I2C address | 0x50–0x57 (set by A0–A2) |
| Page size | 64 bytes |
| Write cycle time | 5 ms max |
| Durabilidad | 1,000,000 erase/write cycles |
| Data retention | > 200 years |
| Standby current | 1 µA max (industrial grade) |
| Encapsulado | DIP-8, SOIC-8, TSSOP-8 |
Notas
- SDA and SCL are open-drain and won't work at all without external pull-up resistors — many breakout boards and MCU dev boards don't include them, so a 'dead' I2C bus is often just a missing pull-up.
- Writes are buffered in 64-byte pages; a single write that crosses a page boundary wraps around and overwrites the start of the same page instead of spilling into the next one, so multi-page writes must be split in software at 64-byte boundaries.
- After each write the chip needs up to about 5 ms to internally commit the data (self-timed write cycle) and won't acknowledge on the bus during that time — either wait it out or poll for an ACK before the next access.
- Rated for roughly 1,000,000 write cycles per page and over 200 years of data retention, which is why it's commonly chosen over a microcontroller's internal EEPROM for data that's rewritten often.







